Optimising data layout for delay-line memory
Jon Crowcroft and Tim Deegan
Electronics Letters, 41(6), pp. 358-359, 17th March 2005.
All-optical programmable logic must use recirculating delay lines for storage. Two approaches to minimising the latency inherent in delay-line-based systems by treating the layout of code and data in memory as an integer linear programming (ILP) problem are presented. It is shown that, although this approach can generate optimal code for small routines, it will not scale enough to compile useful programs.